1. Field of the Invention
The invention is related to an interconnecting mechanism for a three-dimensional integrated circuit, and, more particularly, to an interconnecting mechanism that reduces the crosstalk effect for a three-dimensional integrated circuit.
2. Description of Related Art
Due to the increasing importance of thinness and compactness of portable electronic device for communications, computing and so on, and due to the fact that such electronic products are increasingly multi-function and high performance, semiconductor process technology is moving toward higher integration, such that package structures with ever greater density are being pursued by manufacturers. Thus, manufacturers of both semiconductors and semiconductor packages have started utilizing three-dimensional package techniques to realize a compact packaging system with higher density.
Three-dimensional package techniques result in so-called 3D IC's, integrating a plural layers of chips or circuit substrates by various means into a single integrated circuit. In particular, 3D IC techniques commonly interconnect a plurality of chips using a three-dimensional packaging method on a single integrated circuit. Thus, an interconnecting technique with high density is required to install electrical junctions on the active surface and/or reverse surface of chips for providing a three-dimensional stack and/or package with high density.
Through-silicon via (TSV) technology is currently one of the crucial ways to realize 3D IC's, wherein through-silicon vias are utilized for vertical electrical connections in chips or substrates, allowing the stacking of more chips on a given area to increase the overall package density. Moreover, good use of through-silicon vias can effectively integrate different processes or reduce transmission delays, while reducing power consumption, raising efficiency, and increasing transmission bandwidth due to shorter interconnection pathways. Thus, TSV technology enables stacking of chips to achieve low power consumption, high density packaging and miniaturization.
However, currently, traditional TSV may generate far-end crosstalk and near-end crosstalk between a plurality of through-silicon vias, causing adverse effects on overall chip functionality. As shown in FIG. 1, which depicts the level of near-end crosstalk generated by traditional TSV using current technology, traditional TSV exhibits a near-end crosstalk of −55.077 dB under a signal frequency of 1 GHz (curve S41), while exhibiting a near-end crosstalk of −35.478 dB under a signal frequency of 10 GHz (curve S41). Moreover, FIG. 2 depicts far-end crosstalk generated by traditional TSV technology, showing that traditional TSV exhibits a far-end crosstalk of −57.242 dB under a signal frequency of 1 GHz (curve S31), while exhibiting far-end crosstalk of −37.622 dB under a signal frequency of 10 GHz (curve S31).
Thus, developing an applicable interconnection mechanism that reduces or prevents near-end and far-end crosstalk in a plurality of through-silicon vias in a 3D IC is a highly desirable in the industry.